Please use this identifier to cite or link to this item: https://hdl.handle.net/11000/30645

SiC MOSFET vs SiC/Si Cascode short circuit robustness benchmark

Title:
SiC MOSFET vs SiC/Si Cascode short circuit robustness benchmark
Authors:
Marroquí, David  
Garrigós, Ausias  
Blanes, Jose M.  
Gutiérrez Mazón, roberto  
Maset, Enrique  
Iannuzzo, Francesco  
Editor:
Elsevier
Department:
Departamentos de la UMH::Ingeniería de Comunicaciones
Issue Date:
2019-07-12
URI:
https://hdl.handle.net/11000/30645
Abstract:
Nowadays, MOSFET SiC semiconductors short circuit capability is a key issue. SiC/Si Cascodes are compound semiconductors that, in some aspects, show a similar MOSFET behaviour. No interlayer dielectric insulation suggests, in theory, Cascode JFETs as more robust devices. The purpose of this paper is to compare the drift and degradation of two commercial devices static parameters by exposing them to different levels of repetitive 1.5 μs short-circuit campaigns at 85% of its breakdown voltage. Short-circuit time has been set experimentally, and longer times result in catastrophic failure of MOSFET devices due to over self-heating. For this purpose, pre- and post-test short circuit characterizations are presented.
Knowledge area:
CDU: Ciencias aplicadas: Ingeniería. Tecnología
Type of document:
info:eu-repo/semantics/article
Access rights:
info:eu-repo/semantics/openAccess
Attribution-NonCommercial-NoDerivatives 4.0 Internacional
DOI:
https://doi.org/10.1016/j.microrel.2019.113429
Appears in Collections:
Artículos Ingeniería Comunicaciones



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