Latching Current Limiter for Space Platform Power Distribution Using a Low-Voltage p-MOSFET and a Normally-ON SiC JFET

Abstract

Power distribution using latching current limiters (LCLs) [also known as solid-state power controllers (SSPCs)] is very common for 28- and 50-V bus voltage distribution on European satellite platforms. However, 100-V and even higher voltage distribution platforms generally do not employ the same approach as lower bus voltage platforms since the commonly employed p-MOSFET devices are not well suited for such voltage levels. This work introduces an LCL for 100-V distribution units using a composite power device consisting of a low-voltage p-MOSFET device and a high-voltage, normally-ON silicon carbide junction field effect transistor (SiC JFET). The description of the circuit and the experimental validation using a hypothetical class-2 (2.2–2.8 A), 100-V, LCL is discussed. In addition, in this work, two interesting characteristics are also proposed and validated, and automatic control of the tripping time depending on the overload severity and soft starts for capacitive inrush currents. Robustness and fast reaction, less than 500 ns under short-circuit conditions, have been demonstrated, as well as tight current regulation during overload faults.